Abstract
According to the principle of the binary DETFF (double-edge-triggered flip-flop) based on binary clock, and the switching rule of the logic values of multivalued clock, this article proposes a general structure of AETFF (all-edges-triggered flip-flop) based on multivalued clock that makes the most of the large information-carrying capacity of multivalued signal. Binary or multivalued AETFFs based on arbitrary radices clocks can be designed by referring to the general structure, and are sensitive to every edge of multivalued clocks with a simple structure, high efficiency and low power, which can be implemented not only by CMOS technology, but also by next generation of devices with multiple states. At last, CMOS quaternary AETFF based on quaternary clock was implemented based on the general structure and the transmission function theory, and simulated in HSPICE, its ideal logic functionality being shown.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
