Abstract

A design for a four-quadrant analog multiplier is presented using GaAs MESFETs. The fabricated circuit has a -3 dB bandwidth of 410 MHz with 50- Omega /6.5-pF output loading, nonlinearity of less than 1%, and static power dissipation of 86.1 mW with V/sub dd/=3 V and V/sub ss/=-2 V. Simulations indicate the circuit will operate at frequencies over 2.0 GHz with on-chip loads of 0.15 pF. >

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