A Fully On-Chip Low-Dropout Regulator for SoC applications

Abstract

Abstract This paper presents the design of a capacitor-less low-dropout (LDO) regulator for SoC applications such as mobile phones. To eliminate the external capacitor, a novel compensation circuit is designed which consists of a sense amplifier, a current amplifier, and a PMOS switch. The proposed LDO regulator provides a load current of 50 mA with a drop-out voltage of 240 mV while consuming 10 µA of quiescent current. The novel compensation circuit provides a high-speed path during load transients which reduces the settling time of the LDO. Undershoots /overshoots in the output during load transients are 142.5 mV/245.7 mV with settling time of only 96 ns and load regulation of 7.8 µV/mA. Moreover, this LDO provides a regulated output of 1.2 V for an input voltage ranging from 1.44 V to 3 V. Additionally, an op-amp based band-gap reference (BGR) circuit having a temperature coefficient of 20.49 ppm/˚C is designed to supply a reference voltage (VREF) of 1.2 V to the LDO. The proposed system is designed in UMC 90 nm technology. Monte Carlo simulations show the immunity of design to process and mismatch variations.