A fully non-volatile reconfigurable magnetic decoder

Abstract

In recent years, emerging technologies like spintronics are gaining importance for their ability to tackle issues pertaining to CMOS like high leakage effect, complex data backup operation, and power gating. In this regard, Magnetic Tunnel Junction (MTJ), the most prominent spin device is chosen for our application. A fully Non-Volatile Reconfigurable Magnetic Decoder (NVRMD), using fully NVR NAND/AND and fully NVR NOR/OR logic gates is presented in this paper, following the Logic-In-Memory (LIM) architecture in attempts to mitigate the von Neumann Bottleneck. The proposed designs are superior to their contemporaries in terms of low power, less delay, and dynamic reconfigurability. Reduction in read energy by 79% and write energy by 28% has been achieved in the proposed NVR NAND/AND NOR/OR circuit compared to its counterpart. Corner analysis is performed to establish the robustness of the circuit under extreme conditions in CMOS and reliability analysis is done to understand the effect of process variations of MTJ parameters on the circuit performance.