NVLCFF: An Energy-Efficient Magnetic Nonvolatile Level Converter Flip-Flop for Ultra-Low-Power Design

Abstract

Power dissipation has become a major concern in nanoscale integrated circuits. The power gating and dual-supply design methods are among the most effective approaches for reducing the static and dynamic power consumptions. However, these methods require efficient data retention and voltage level conversion. In this paper, a nonvolatile level converter flip-flop (NVLCFF) is proposed to be used in ultra-low-power integrated circuits. Our proposed NVLCFF employs the magnetic tunnel junction (MTJ) for data retention. Spin transfer torque along with the spin Hall effect is used for reconfiguring the MTJs. The peripheral circuitry is designed using 7-nm FinFET as one of the leading industrial technologies. Furthermore, to facilitate the use of the dual-supply approach, voltage level conversion is performed in the structure of the proposed NVLCFF. According to the HSPICE simulations, the power consumption, backup energy and restore energy of the proposed circuit are on average 59%, 48% and 92% lower than the other NVLCFFs based on the previous nonvolatile flip-flops with different MTJ structures. Furthermore, the comprehensive Monte Carlo simulations indicate the robustness of the proposed design in the presence of major MTJ and FinFET process variations as compared to the previous designs.