Abstract
This paper presents a fully integrated SAR ADC for GSM/WCDMA/LTE triple-mode transceiver (RFIC) with novel non-binary DAC structure and digital correction techniques. All blocks are implemented in a single chip with 0.044mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /0.066mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> for analog/logic. Reconfigurable structure is used for multi-mode operation by adjusting ADC speed and noise, where SNDR of 67.0dB in GSM and 58.2dB in WCDMA/LTE are achieved at the sampling frequencies of 52MS/s and 80MS/s, respectively.
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