Abstract
This paper presents the design and postlayout simulation results of a capacitor-less low dropout (LDO) regulator fully integrated in a low-cost standard 180 nm Complementary Metal-Oxide-Semiconductor (CMOS) technology which regulates the output voltage at 1.2 V from a 3.3 to 1.3 V battery over a −40 to 120 °C temperature range. To meet with the constraints of system-on-chip (SoC) battery-operated devices, ultralow power (Iq = 8.6 µA) and minimum area consumption (0.109 mm2) are maintained, including a reference voltage Vref = 0.4 V. It uses a high-gain dynamically biased folded-based error amplifier topology optimized for low-voltage operation that achieves an enhanced regulation-fast transient performance trade-off.
Highlights
The increasing appearance of long-life autonomous portable and wearable equipment [1,2,3,4,5,6,7,8] demanding miniaturized systems with decreasing power consumption has brought to the forefront the design of efficient power management units (PMU), where low dropout (LDO) regulators play a key role [9,10,11,12,13]
Any dependence on the temperature and/or the battery voltage in Vref is transferred to Vout. This voltage reference is typically implemented as a bandgap voltage reference with a combination of complementary to absolute temperature (CTAT) and proportional to absolute temperature (PTAT) voltages or currents to provide a reliable temperature and supply
The presented LDO regulator has been simulated in a 180 nm complementary metal–oxide–semiconductor (CMOS) technology, providing a 1.2 V regulated Vout from a 3.3 to 1.3 V supply voltage
Summary
The increasing appearance of long-life autonomous portable and wearable equipment [1,2,3,4,5,6,7,8] demanding miniaturized systems with decreasing power consumption has brought to the forefront the design of efficient power management units (PMU), where low dropout (LDO) regulators play a key role [9,10,11,12,13]. Design guidelines are used to minimize both the power and area consumption, while maintaining an adequate regulating performance with a low-voltage topology for our requirements: a 1.2 V output voltage, Vout , compatible with battery supply voltage values VBAT = 3.3 − 1.3 V, for a maximum ILoad = 50 mA over a CLoad,max = 50 pF. In this attempt, we have followed the compensation and dynamic-enhancement strategies successfully adopted in [27] but adapted to provide the required low-voltage compatibility, further optimizing the transient response by introducing a multiple dynamic feedback strategy.
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