Abstract
This brief presents a new frequency acquisition method using a semirotational frequency detection (SRFD) algorithm for referenceless clock and data recovery (CDR) in a serial-link receiver. The proposed SRFD algorithm classifies the bang–bang phase detector (BBPD) outputs to estimate the current phase state and detects the frequency mismatch between the input data and the sampling clock. The voltage-controlled oscillator (VCO)-track path in a digital loop filter (DLF) enables online calibration of a drifted frequency of the VCO caused by temperature or voltage variation after a frequency acquisition. The proposed algorithm can be implemented as a digitally synthesized circuit, lowering design efforts for referenceless CDRs. A 10-Gb/s transceiver IC with the proposed algorithm, fabricated in a 65-nm CMOS process, demonstrates successful recovery of the input phase without any reference clock.
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