Abstract

This paper presents a radiation-hardened high-resolution current memory cell (CMC) that can be used to implement current-mode analog-to-digital converters (ADCs) for space-embedded, charge-coupled device processors. This CMC is based on a fully differential structure and on the Miller effect to reduce charge-injection errors. Using a commercial 0.35-μm 3.3-V complementary metal-oxide-semiconductor (CMOS) process, the radiation tolerance of this CMC has been enhanced by designing enclosed n-channel MOS transistors, using p-channel MOS switches only, and introducing guard rings wherever necessary. Results show that the CMC accuracy is 10 bits and that its estimated linearity error is &3x000B1;50 nA for a [-200 μA; 200 μA] dynamic input current range. Experimental results point out that signal-dependent charge injections are divided 23 times at least, which improves the CMC accuracy by approximately 4 bits. The measured acquisition time for a 200-μA input step transition to achieve a 10-bit settling accuracy is 50 ns. The active chip area and the power consumption of the proposed CMC are 0.042 mm 2 and 6 mW, respectively.

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