A flash ADC based on VCO-based comparator with 26.3dB SFDR and 7.5M BW at 1V

J Z Chen,Z T Xu,Q Yu,N Ning,Y Liu,L M Rong,W M Lim

doi:10.1109/edssc.2014.7061144

A flash ADC based on VCO-based comparator with 26.3dB SFDR and 7.5M BW at 1V

J Z Chen, Z T Xu + Show 5 more

https://doi.org/10.1109/edssc.2014.7061144

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Publication Date: Jun 1, 2014

Citations: 2

Affiliation: National Engineering Research Center of Electromagnetic Radiation Control Materials, University of Electronic Science and Technology of China

#Analog To Digital Converters #Flash Analog To Digital Converters + Show 8 more

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Abstract

This paper presents an architecture of flash analog to digital converters (ADCs) implemented with VCO-based comparators. The architecture reduce the power consumption of ADCs operating at high speed. The flash ADC is designed with 7 VCO-based compactors operating at 15MHz and simulated with CPPSIM. The signal to noise ratio (SNR), signal to noise and distortion ratio (SNDR), and spurious free dynamic range (SFDR) of the flash ADC are 17.5, 16.6 dB, and 26.3 dB, respectively with an input of 1MHz sine signal.

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