Abstract
This article proposes a feedforward voltage control strategy (FVCS), aimed to reduce the output voltage double-line-frequency ripple and the output capacitance of the single-phase ac–dc power factor correction (PFC) converters. It is known that a large capacitance is required to reduce the voltage ripple but it results in low power density. With the proposed FVCS achieving low output voltage ripple, the output capacitance can be reduced, so the size and cost of the converter can also be reduced. Moreover, the proposed FVCS only needs one voltage sensor which can get rid of the necessary current sensor in the conventional harmonic input current injection technique. In this article, the detailed mathematical analyses, harmonic current limitations, and key parameters, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$k$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$N_{\Delta \text{ECo}}$ </tex-math></inline-formula> , of this proposed control strategy are derived. Also, the design procedures for a flyback converter are provided. Finally, computer simulations and experimental results of a 100-W prototype circuit are presented to verify the effectiveness and performance of the proposed FVCS.
Published Version
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call