A fault-tolerant computer system for India’s satellite launch vehicle programmes

Abstract

The on-board computer (obc) systems that are planned to be used in India’s forthcoming launch vehicle programmes, viz, the Augmented Satellite Launch Vehicle (aslv) and Polar Satellite Launch Vehicle (pslv) exercise total control over the vehicle during its flight, carrying out complex real-time computations related to vehicle navigation, guidance, autopilot and the generation of mission critical event commands. The success of the country’s launch vehicle missions, therefore, depends to a very large extent on the reliable operation of theobc. To enhance the reliability of such a computer system, fault-tolerant design techniques have been resorted to and the system after thorough testing is now ready to be flown on theaslv. This paper highlights the design of such anobc mainly from the points of view of the fault-tolerant methods incorporated. The relevance of fault-tolerance to critical flight computers is first discussed. This is followed by a presentation of possible fault-tolerant configurations and the considerations that led to the choice of the present system. A brief description of theobc system architecture and the methods of testing that ensure its reliable operation follow. The paper concludes with an assessment of the present system and possible future improvements.