A fast readout and encoding system for real-time processors

Abstract

A fast system of data preparation for event selection hardware processors is described in this paper. The system enables input pulses to be registered, the serial numbers and the number of triggered channels to be converted to binary code. The system consists of several 16-channel input register and priority encoder modules and of one serial-to-parallel converter or buffer. The input register and encoder modules are connected by a fast dataway to cascade then in order to increase the number of inputs to 1024 and to transmit information to the serial-to-parallel converter which has a capacity of eight 12-bit words. The binary codes of the serial numbers of the triggered channels are transferred from the serial-to-parallel converter to an arithmetic part of the processor. The time required for the selection and encoding of the serial number of each triggered channel is 25 ns. It is possible to transfer data via the CAMAC dataway as well.