Abstract

A pipelined hardware implementation is provided for a fast binary image fractal coding. The related algorithm suggests each range segment, R segment, is classified into three groups of absolutely black, absolutely white, and non-monochrome. For absolutely black and absolutely white R blocks, which are very probable in binary images, the required storage and computation has low cost. For non-monochrome ones, number of white pixels in each R segment and the index of corresponding domain segment, D segment, for current R segment are stored. The low computational hamming distance is used for R and D segments comparison. Moreover, to speed up the fractal coding, a lookup table to retrieve coded range segment information are utilized. The encoder module is successfully synthesized to a FLEX10K family device. Experimental results show that the proposed algorithm is both fast and accurate.

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