A ENOB 10.3 bit, 103 μW ON-CHIP CALIBRATION SAR ADC

Abstract

Across the board, the performance of ADCs has been under increasing scrutiny because of the rapid growth of portable electronic devices and biomedical sensors. As part of the sensor’s long-term work, its power consumption should also be as low as possible. Sensors benefit from SAR ADCs’ small size and low power consumption, making them an ideal fit for ADCs. To overcome the limitations of accuracy and linearity of ADCs caused by manufacturing process deviations, a 12-bit, 1 MS/s low-power SAR ADC based on 180 nm CMOS technology is presented. The front-end analog calibration system ensures the ADC is at its best. The design also includes low fan-in SAR logic to reduce the capacitive load on the comparator and increase the comparison speed. The layout area is 0.3 mm2, approximately 30% less than conventional products of the same process.