Abstract
A low-power and low-noise dynamic instrumentation amplifier (IA) for biopotential acquisition is presented. A dynamic IA that can reduce power consumption with a timely piecewise power-gating method, and noise level with an alternating input and chopper stabilization technique is fabricated with a 0.13-μm CMOS. Using the reconfigurable architecture of the IA, various combinations of the low-noise schemes are investigated. The combination of power gating and chopper stabilization shows a lower noise performance than the combination of power gating and alternating input switching scheme. This dynamic IA achieved a power reduction level of 50% from 10 µA to 5 µA and a noise reduction of 90% from 9.1 µVrms to 0.92 µVrms with the combination of the power gating and chopper stabilization scheme.
Highlights
Attempts are being made to perform comfortable and continuous health monitoring in daily life through a wearable system [1,2,3,4,5]
We present a dynamic instrumentation amplifier (IA) scheme to reduce power consumption in an analog readout channel using power gating (PG)
To recover worsened noise level according to the dynamic IA adaptation, chopper-stabilization (CS), and alternating input switching (AIS) techniques are investigated
Summary
Attempts are being made to perform comfortable and continuous health monitoring in daily life through a wearable system [1,2,3,4,5]. Many biosignals, including electrocardiogram, electroencephalogram, electromyogram, body fat, and heart rate are monitored in contemporary commercialized wearable devices [6,7,8]. Such battery-operated wearable systems inherently require low power, and, thereby, an ultra-low-power health monitoring circuit. Many research studies have reported a reduction in the flicker noise by various techniques, including correlated double sampling [10], chopper stabilization [11,12,13,14], large signal excitation [15,16], and bulk switching scheme [17]. To recover worsened noise level according to the dynamic IA adaptation, chopper-stabilization (CS), and alternating input switching (AIS) techniques are investigated. The optimal combination and operating conditions between PG, CS, and AIS are investigated
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