A dual mode self-test for a stand alone AES core.

Fakir Sharif Hossain,Muhammad Ashar,Taiyeb Hasan Sakib,Rian Ferdian,Gulistan Raja

doi:10.1371/journal.pone.0261431

Fakir Sharif Hossain, Muhammad Ashar + Show 3 more

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https://doi.org/10.1371/journal.pone.0261431

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Abstract

Advanced Encryption Standard (AES) is the most secured ciphertext algorithm that is unbreakable in a software platform's reasonable time. AES has been proved to be the most robust symmetric encryption algorithm declared by the USA Government. Its hardware implementation offers much higher speed and physical security than that of its software implementation. The testability and hardware Trojans are two significant concerns that make the AES chip complex and vulnerable. The problem of testability in the complex AES chip is not addressed yet, and also, the hardware Trojan insertion into the chip may be a significant security threat by leaking information to the intruder. The proposed method is a dual-mode self-test architecture that can detect the hardware Trojans at the manufacturing test and perform an online parametric test to identify parametric chip defects. This work contributes to partitioning the AES circuit into small blocks and comparing adjacent blocks to ensure self-referencing. The detection accuracy is sharpened by a comparative power ratio threshold, determined by process variations and the accuracy of the built-in current sensors. This architecture can reduce the delay, power consumption, and area overhead compared to other works.

Highlights

Advanced Encryption Standard, the short form is AES, is the world’s most secured cryptographic algorithm established by Rijmen and Demon and got approval by National Institute of Standards and Technology (NIST), US in 2001 [1]
A parametric mismatch identification technique for the AES-128 chip is presented in this paper
Several technical designs are considered in power side-channel analysis to deliver a stand-alone and reliable AES core

Summary

Introduction

Advanced Encryption Standard, the short form is AES, is the world’s most secured cryptographic algorithm established by Rijmen and Demon and got approval by NIST, US in 2001 [1]. Numerous crypt-analytical attacks such as brute-force, Linear crypt-analysis, differential crypt-analysis, etc., are failed to display a potential threat for the security of the AES [2]. A brute force attack is a potential threat to retrieve the plaintext by reading the number of rounds in AES [3]. The AES-128 cryptography system provides an approximated time frame of one billion years to mount a brute force attack to retrieve the plane text. Due to this impressive security potentiality of AES, it is being used in various emerging applications, either in software or hardware implementations. Hardware implementation of the algorithm offers higher security and speed than that of its software implementation.

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