Logic Encryption to Prevent Trojan Insertion with Dual-Function Gates

Abstract

The outsourcing of integrated circuits (IC) makes some of the vulnerabilities and enable the adversary to reverse engineering attack, IP piracy, overproduction, counterfeiting or hardware Trojan (HT) insertion throughout the supply chain of the IC. The attacker by inserting the hardware Trojan can destroy normal operation in IC, or steal sensitive information from the design. Nowadays the prevention of IP piracy and HT insertion is an important issue in hardware security. Logic encryption as part of Design for Hardware Trust (DFHT) techniques, applies key-gates in order to encrypt the logic of the chip. Therefore if the key inputs are correct the chip has normal function otherwise function is wrong, this work prevention of IP piracy. Furthermore, in some cases of logic encryption techniques, the rare signals that are a good place for insert an HT can be reduced. Therefore, if the HT is inserted in the chip by functional tests can be detected. In this article, a new key-gate that has a double-function is designed to prevent HT insertion as well as preventing from IP piracy. In this paper, by reducing the rare signals and reducing the signals with low observability, prevent HT insertion also, this type of key-gates is resistant to reverse engineering more than the previously designed key-gates. This key-gates has overhead less than insertion based method with XOR and XNOR key-gates.