Abstract
In this paper, we design the hardware architecture of the BICM(Bit Interleaved Coded Modulation) module for next generation European broadcast system and implement the BICM module with DSP(Digital Signal Processor) TMS320C6474. Simulation result shows that the BER(Bit Error Rate) performance of the fixed-point BICM module using more than 8 bits is very similar to that of the floating-point BICM module.
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