A Digitally Programmable CMOS Feedback ASIC for Highly Stable MEMS-Referenced Oscillators

Abstract

This paper describes a digitally programmable single-chip feedback ASIC for MEMS-referenced oscillators in the 0.4–15-MHz range. The chip contains a differential-difference low-noise amplifier (DD-LNA), a variable-gain amplifier (VGA) for analog gain control, several programmable-gain amplifiers (PGAs) for digital gain control, two second-order active $R-C$ band-pass filters (BPFs) for band selection, two all-pass filters (APFs) for phase shifting, an automatic level control (ALC) loop, and differential output buffers to allow interfacing with a wide variety of MEMS devices. Many on-chip parameters are digitally programmable via a standard serial peripheral interface (SPI) bus, thus allowing fine-grained optimization of the overall feedback transfer function. In addition, a compensation path with its own PGAs, a programmable attenuator, and an APF is provided for canceling electrical feedthrough within the chosen MEMS resonator. The chip was designed in 180-nm CMOS and consumes 4.6 mW. It was used to realize a ~6.9-MHz low-phase-noise (−105 dBc/Hz at 10 Hz) oscillator based on an ultra-high- $Q$ ( $\sim 3.2\times 10^{6}$ at a bias voltage of 35 V) wafer-level vacuum-encapsulated Lame mode single-crystal Silicon (SCS) MEMS resonator. Oven control and active temperature compensation improve the oscillator’s frequency stability to ±0.5 ppm with an Allan deviation of $1 \times 10^{-8}$ at $10^{3}$ s. Two such oscillators were also electrically coupled to realize a low-phase-noise quadrature reference oscillator suitable for complex-domain PLLs.