A device for spike train sampling with built-in memory

Abstract

The described interface to a digital computer measures interspike interval durations with a resolution of 10 μs. A built-in first-in first-out (FIFO) memory relieves the host computer from frequent I/O intensive tasks. The internal FIFO buffer can store up to 512 data words (wordlength is 16 bit) and works on the dual-port principle. This way the acquisition of a neuronal spike train is completely independent of the computer's simultaneously ongoing data access. A simple handshake protocol between the interface and the computer prevents any overhead communication. The buffer architecture of the instrument releases the host computer from high speed I/O handling schemes like real-time, clock-controlled, polling or interrupt procedures, that would request assembly language support. The body of two software, driver routines in the BASIC and the PASCAL language is presented. A complete and detailed schematic diagram of the circuitry is included.