A Design of Low Power Resistorless Sub-threshold CMOS Bandgap Voltage Reference

Abstract

AbstractThe present work focuses on the analysis and design of a resistorless sub-threshold voltage reference. A low power CMOS voltage reference is developed using 180 nm process technology. In conventional band gap reference bipolar transistors (BJT’s) and resistors are used, where BJT’s are parasitic in nature and resistors consume larger area on the silicon chip and therefore the cost of the chip will be increased. From conventional band gap reference, BJT’s and resistors are replaced with MOS transistors which operate in linear region and sub-threshold region respectively to generate the required proportional to absolute temperature (PTAT) and complementary to absolute temperature (CTAT) voltages. The proposed voltage reference circuit generates a stable voltage of 414.96 mV at 270C under 1.8 V of power supply. This circuit operates stable in the temperature range of –200C to 1200 C. Silicon chip area is 0.000916 mm2 and power consumption is 0.0016 µW. When the proposed work is compared with similar architectures 88% of reduction in chip area and 79% of reduction in power consumption is observed. These are the two important observed outcomes from this proposed work.KeywordsTemperature coefficientBand gapSub-thresholdTriodeCTATPTAT