A design methodology of bipolar standard cell LSIs for Gbit/s signal processing

Koike Koike,Ichino Ichino,Kawai Kawai

doi:10.1109/bipol.1993.617506

A design methodology of bipolar standard cell LSIs for Gbit/s signal processing

Koike Koike, Ichino Ichino + Show 1 more

https://doi.org/10.1109/bipol.1993.617506

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Publication Date: Jan 1, 1993

Citations: 8

Affiliation: NTT Basic Research Laboratories

#Clock Distribution Scheme #Differential Clocks + Show 8 more

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Abstract

A bipolar standard cell LSI design methodology for Gbit/s LSIs is described. A unique configuration of cell libraries which have internal fixed routing channels especially for differential clocks and a clock distribution scheme that considers the equal length and load of differential clocks makes it possible to achieve a 1.8 Gbit/s 2.5 K-gate LSI.

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