Abstract

Current and capacitance deep-level transient spectroscopy (DLTS) measurements have been used to examine the effect of accelerated lifetime stress tests on AlGaAs/GaAs high electron mobility transistor structures. The epilayers for these devices were grown by molecular beam epitaxy on semi-insulating GaAs substrates, and they were processed to have 0.7-μm long gates. The major defect detected by both the capacitance and current measurements on unstressed control devices is the DX center in the AlGaAs. The current DLTS tests on stressed samples reveal an additional defect, which is not found in capacitance DLTS measurements on the same devices. The new current DLTS line appears to be a minority-carrier trap, which is not expected as the trap filling pulse was not set to inject minority carriers. These features can be explained if the defect is associated with surface states located between the gate and either the source or the drain.

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