A decomposition-based reliability and makespan optimization technique for hardware task graphs

Abstract

This paper presents an approach to optimize the reliability and makespan of hardware task graphs, running on FPGA-based reconfigurable computers, in space-mission computing applications with dynamic soft error rates (SERs). Thus, with rises and falls of the SER, the presented approach dynamically generates a set of solutions that apply redundancy-based fault tolerance (FT) techniques to the running tasks. The set of solutions is generated by decomposing the task graph into multiple subgraphs, applying a multi-objective optimization algorithm to the subgraphs separately, and finally combining and filtering out the obtained solutions of the subgraphs. In this regard, a heuristic has been proposed to decompose task graphs in such a way that a high coverage of the true Pareto set is attained. The experiments show that the presented approach covers 97.37% of the true Pareto set and improves the average computation time of generating the Pareto set from 6.29 h to 81.86 ms. In addition, it outperforms the NSGA-II algorithm in terms of the Pareto set coverage and computation time. Additional experiments demonstrate the advantages of the presented approach over the state-of-the-art adaptive FT techniques in dynamic environments.