A dc charge sheet turn-on model for the I–V characteristics of doped polysilicon thin film transistors

Abstract

An explicit semi-empirical analytical model for surface potential is proposed for doped polysilicon thin film transistors (poly-Si TFTs). The model shows good agreement with numerical calculation of surface potential in the weak and strong inversion regions. Further, a surface-potential-based dc charge sheet turn-on model is also proposed for small grain doped poly-Si TFTs. The validity of the model is tested by using measured ID–VDS and ID–VGS data for n-channel doped poly-Si TFTs. The results show that the drain current in the device is predicted by the model with good accuracy. Although the model does not consider the grain boundary potential barrier ΨB explicitly, the validity of the model is attributed to the fact that in the turn-on region the gate voltage is sufficiently high resulting in a decrease of ΨB to low values and thus not affecting the drain current significantly. The model also considers the kink effect which becomes dominant at higher drain to source voltage.