A Current Reference with high Robustness to Process and Supply Voltage Variations unaffected by Body Effect upon Threshold Voltage

Abstract

This paper presents a significantly improved concept for a proportional-to-absolute temperature (PTAT) current reference designed and manufactured for test purposes in a 0.18 μm 5V standard CMOS technology. The current reference concept has been proven to be very robust against both manufacturing tolerances and supply voltage interference over a very wide supply voltage and temperature range. An evaluation of 19 Die-to-Die (D2D) samples of the manufactured current source showed a worst-case variation in the output currents of only $\pm 3\%$ . Finally, a supplementary Monte Carlo Lot-to-Lot (L2L) simulation with a sample size of 1000 showed that the to be expected worst-case tolerance should be smaller than $\pm 12 \%$ . The circuit consists of 3 stacked unbalanced differential pairs operating in weak channel inversion, which are used as a PTAT voltage generator to define a current by means of a current loop consisting of a linear and nonlinear current mirror. By this it can be achieved that the overall statistics of the reference current is almost exclusively determined by the oxide thickness statistics. The manufactured version of the proposed current reference circuit provides a reference current of 2.2 μA, the area required is 0.1 mm2. A simulation of a cascoded version for DC blocking ratio $\mathrm{PSRR} =20\log_{10}(\vert \delta\mathrm{I}_{\mathrm{R}\mathrm{e}\mathrm{f}}/\delta\mathrm{V}_{\mathrm{d}\mathrm{d}}\vert /(\mathrm{I}_{\mathrm{R}\mathrm{e}\mathrm{f}}/\mathrm{V}_{\mathrm{d}\mathrm{d}}))$ of the power supply $\mathrm{V}_{\mathrm{d}\mathrm{d}}$ onto the reference current I Ref provides −50 dB within the $\mathrm{V}_{\mathrm{d}\mathrm{d}}$ range from 1.3 V to 5 V.