Abstract
A CT (continuous-time) sigma-delta modulator (CT ΣΔM) clocked at 128 MHz with a hybrid active-passive loop filter is presented for WCDMA applications. This 5th-order loop filter architecture mainly consists of two passive integrators and three active integrators. To erase the summation amplifier used in the CIFF (chain of integrators with weighted feedforward summation) topology, the capacitive feedforward structure is employed. In addition, local feedback resistors are formed as the bridge-T network to reduce the chip area. After chip being fabricated in TSMC 0.18 µm 1.8 V CMOS technology, the overall measured results have achieved dynamic range of 62 dB over a 2 MHz signal bandwidth, SNDR of 60.26 dB, IM3 of −48 dB and power dissipation of 9 mW. Including pads, the overall chip area is 0.642 (1.07 × 0.6) mm2.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.