A Convenient Implementation of the Ternary Logic: Using Anti-Ambipolar Transistors and PMOS Based on Printed Carbon Nanotubes

Abstract

Ternary logic is said to become the potential solution to overcome the issues we encounter in binary systems. To enlighten this potential, we propose a ternary logic based on novel Anti-ambipolar transistors (AATs) and PMOSs. Conventional AATs require a complex fabrication process, and their operation is beyond the range of typical CMOS (>5 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$V$</tex> ). However, Inkjet-printed AATs are easy to fabricate, and their operating voltage is under 2V. Thus, Inkjet-based AATs are highly-suitable to use with other printable devices. Therefore, in this paper, we propose a set of novel ternary logic based on printed AATs and carbon-nanotube PMOSs. With these AATs and PMOSs, we propose 10 novel logic gates that include a practical balanced ternary full adder (TFA). Our TFA presents a compact design that can be implemented only with 41 PMOSs and 17 AATs. Our TFA reduces transistor count by −22.6% compared to the latest TFA design. We highlight that our ternary logic cells based on AATs and PMOSs are 1) the most compact design in terms of transistor count and 2) very convenient to fabricate.