A concurrent fault simulation for crosstalk faults in sequential circuits

Abstract

Existing principles for crosstalk fault simulation require the storage of waveform representation at each node in the circuit throughout a time frame. At the end of each time frame a pair of waveforms, one belonging to an aggressor node, and one depicting a victim node, is inspected. If the fault is captured, it will be simulated until it is either detected or the test vectors are exhausted. This fault detection method can require a prohibitive amount of computation time for a large sequential circuit with high number of possible fault pairs to be tested. With our simulation technique, introduced in this paper, these operations can be processed concurrently for many faults. The fault list dynamically adjusts itself during the simulation to accommodate fault injection and fault dropping. Experimental results on ISCAS'89 benchmark circuits show that a substantial improvement in CPU time, over a conventional method, is achieved with a trade-off in the amount of memory consumed.