Abstract

In this paper, a new method for implementing all two-input logic gates on an identical single-stage structure is proposed. We have used unique characteristics of single-electron transistors, which have periodic output–input relation, to design the gates and implement all two-input logic gates (symmetric/non-symmetric, monotonic/non-monotonic) by a single-stage design including only one single-electron transistor. In conventional monotonic devices, such as BJTs and MOSFETs, implementing non-monotonic logic gates such as XOR and XNOR is impossible with a single-stage circuit and a multistage design is required which leads to more complexity, more chip area and higher power consumption. We present the proposed methodology at first, and then, the details of the designs are investigated. The results are obtained analytically using a new approach named two-potential and then confirmed by numerical methods. Furthermore, important characteristics of the proposed gates such as maximum operating temperature, speed of the gates and frequency limitations, power consumption (static and dynamic) and scaling to other technologies have been investigated. Finally, a general idea has been presented about the application of the introduced approach and gate structures in the field of logic circuit and system designing.

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