Power consumption and chip area reduction techniques for MB-OFDM UWB RFICs

Abstract

For MB-OFDM UWB systems with worldwide interoperability the band group 1, 3 and 6 should be included. Multiple bands, high frequency and wideband operation pushes the classical implementation to physically big chip area and high power consumption. Using the latest deep submicron CMOS technology can solve this problem in digital circuits, however it is not in favor of RF and analog performance; furthermore the time spent on characterizing the latest process can significantly increase the development cost and delay the time to market. In this paper, power consumption and chip area reduction techniques in both system concept and transistor level design are proposed; and they are verified by some low-power high performance MB-OFDM UWB RF ICs in a digital 90 nm CMOS technology. The results demonstrate that with the proposed techniques, power consumption and chip area can be reduced significantly.