A Comparison of MVDR and LCMV Beamformers’ Floating Point Implementations on FPGAs

Abstract

Adaptive beamformers are designed with the aim of detection of noise and intentional destructive interference and then removing them from the desired signal. This is done by placing high attenuation in the direction of the destructive signal in the radiation pattern of antenna arrays without attenuating the signal from a known direction. Minimum variance distortionless response and linearly constrained minimum variance are among such algorithms in mobile communications. A short explanation of the theory and weights formulae of these beamformers will be given. Two designs for weights calculations in Simulink with the added library of DSP-Builder tool from Altera will be presented. Quadrature Rectangular decomposition with Modified Gram-Schmidt algorithm is used instead of the direct matrix inversion. All calculations are done in single floating point mode for the required high accuracy. Modelsim has been used for hardware simulation and measuring the required clock cycles. The target FPGA is Aria10 from Altera which has floating point DSP blocks for high-performance computations. Hardware resources usage, power consumption, maximum clock frequency and update rate for different matrix sizes of these two beamformers are compared and discussed. The results are also compared with some other relevant reported works.