A Compact Short-Channel Analytical Drain Current Model of Asymmetric Dual-Gate TMD FET in Subthreshold Region Including Fringing Field Effects

Niraj Kumar Singh,Manodipan Sahoo,Monika Kumari

doi:10.1109/access.2020.3038421

Niraj Kumar Singh, Manodipan Sahoo + Show 1 more

Open Access

https://doi.org/10.1109/access.2020.3038421

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Abstract

A compact drain current model is developed for an asymmetric, dual gate, monolayer 2 - D Transition metal dichalcogenide (TMD) field effect transistor (FET) in the subthreshold region. The work includes the effect of source to drain tunneling and gate dielectric fringing effects. The model is systematically derived for an asymmetric, dual gate structure. The model developed is also extended into a dual-gate symmetric structure. The characteristic length expression has only physical and dimensional parameters including the contribution of fringing field effects from both front and back gate dielectric. The model is validated with simulation results obtained using NEGF based nanodevice simulators and experimental data of WSe <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> p-channel FET. Also, transfer characteristics, output characteristics, subthreshold swing and output resistance are compared with reported data in literatures. A close agreement is observed with some disparity arising because of the non-inclusion of back gate fringing effects and source to drain tunneling in their models. The proposed model captures the effects of different high-κ gate dielectric materials and its thicknesses. Impact of temperature is also studied on transfer characteristics. The model is also scalable from ultrashort channel regime to long channel regime. Finally, the model can be applicable not only for TMD materials but other 2 - D materials also.

Highlights

2-D Transition metal dichalcogenides (TMDs) have attracted a lot of attention to the scientific community because of its interesting properties like natural bandgap, impurity charge free surfaces and atomic scale thicknesses [1], [2].Their properties make it suitable channel materials for ultrascaled technology nodes below 10 nm
Our developed model is verified with numerical simulation data obtained using NEGF based nanodevice simulator, NanoTCAD ViDES [13] as well as with experimental data of W Se2 p-channel field effect transistor (FET) [14]
The proposed model is deviating after Vgs= 0.17 V for NEGF simulation data and after Vgs= -0.35 V for Experimental data, this is because of Ids − Vgs characteristics obtained from NEGF simulation and Experimental data enter to region other than subthreshold after Vgs= 0.17 V for NEGF simulation and Vgs= -0.35 V for experimental data respectively

Summary

INTRODUCTION

2-D Transition metal dichalcogenides (TMDs) have attracted a lot of attention to the scientific community because of its interesting properties like natural bandgap, impurity charge free surfaces and atomic scale thicknesses [1], [2].Their properties make it suitable channel materials for ultrascaled technology nodes below 10 nm. In TMD FETs for channel length below 10 nm, transport mechanism is not driftdiffusion based their model fails to model short-channel TMDFETs. the model developed does’nt include back gate fringing field effects. The approach is applicable for selected ranges of dielectric constants of dielectric and channel materials and its thicknesses severely limiting our purpose to develop the compact model for any arbitrary 2 − D TMD FET At such nanometric dimensions, source to drain tunneling can’t be ignored. This work for the first time derives the compact subthreshold model for an asymmetric TMD FET structure including the source to drain tunneling effect and front and back gate dielectric fringing effects.

ASYMMETRIC DUAL GATE STRUCTURE

SYMMETRIC DUAL GATE STRUCTURE

SOURCE TO DRAIN TUNNELING MODEL

RESULTS AND DISCUSSION

CONCLUSIONS