Abstract

High-resolution electronic interface circuits for transducers with nonlinear capacitive impedance need an operational amplifier, which is stable for a wide range of load capacitance. Such operational amplifier in a conventional design requires a large area for compensation capacitors, increasing costs and limiting applications. In order to address this problem, we present a gain-boosted two-stage operational amplifier, whose frequency response compensation capacitor size is insensitive to the load capacitance and also orders of magnitude smaller compared to the conventional Miller-compensation capacitor that often dominates chip area. By exploiting pole-zero cancellation between a gain-boosting stage and the main amplifier stage, the compensation capacitor of the proposed operational amplifier becomes less dependent of load capacitance, so that it can also operate with a wide range of load capacitance. A prototype operational amplifier designed in 0.13-m complementary metal–oxide–semiconductor (CMOS) with a 400-fF compensation capacitor occupies 900-m chip area and achieves 0.022–2.78-MHz unity gain bandwidth and over 65 phase margin with a load capacitance of 0.1–15 nF. The prototype amplifier consumes 7.6 W from a single 1.0-V supply. For a given compensation capacitor size and a chip area, the prototype design demonstrates the best reported performance trade-off on unity gain bandwidth, maximum stable load capacitance, and power consumption.

Highlights

  • The internet of things (IoT) is a new paradigm, which connects any physical objects embedded with ambient computational intelligence to each other such that these objects can recognize others and exchange collected data [1,2,3]

  • Such an operational amplifier in a conventional design requires a large area for compensation capacitors, increasing costs and limiting applications

  • In order to address this problem, we present a gain-boosted two-stage operational amplifier, whose frequency response compensation is less sensitive to the load capacitance compared to the conventional Miller frequency compensation

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Summary

Introduction

The internet of things (IoT) is a new paradigm, which connects any physical objects embedded with ambient computational intelligence to each other such that these objects can recognize others and exchange collected data [1,2,3]. Capacitive micromachined ultrasonic transducers (CMUTs) [11,12,13], piezoelectric transducers [14,15,16], and electro-neural stimulators [17,18,19,20,21], in particular, need to drive nonlinear capacitive load with a large impedance variation With such a variable capacitive load, in order to achieve an extremely high-resolution control (e.g., 16-bit resolution) to the extent well beyond the present state-of-the-art, which is typically implemented with less than 6–8-bit resolution [22,23,24], the electronic interface circuitry of such transducers requires a precision high-gain operational amplifier.

Conventional Miller Compensation
Ahuja Compensation
Conventional Feedforward Compensation
Pseudo Single-Stage Amplifier
Proposed Architecture
Circuit Implementation
Pole-Zero Cancellation and Sensitivity Analysis
Common-Mode Rejection Ratio Analysis
Simulation Results and Discussion
Bias Circuit
Conclusions
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