A combined technique for amplifier oriented small‐signal noise model extraction

Abstract

Based on the earlier experimental investigation of the existing GaAs pHEMT small-signal modeling approaches and their applicability to different manufacturing processes, a combined automatic small-signal noise model extraction technique, suitable for design of low-noise and buffer amplifiers is proposed. The technique is based on the usage of measured S-parameters of passive test structures and S-parameters of the transistor in cold modes. Expressions are given for extraction of the intrinsic parameters of an equivalent circuit using linear regression. It is shown that the application of the proposed method allows extracting a small-signal GaAs pHEMT model both in the probe-tip reference planes and at on-wafer calibration planes. The moving average algorithm was applied for preprocessing the results of measurements of the 50 Ohm noise figure during extraction of the noise model. The results of S-parameters and noise figure simulation agree well with the measurements. The new technique was implemented as a plugin in a commercial EDA tool and enables to derive a ready-to use small-signal noise model from measured S-parameters and 50 Ohm noise figure of a 0.15 μm GaAs pHEMT.