A Code Width Built-In-Self Test Circuit for 8-bit Pipelined ADC

Abstract

This paper presents a novel built-in-self-test (BIST) scheme based on code-width and sample difference. The proposed BIST scheme is applied on 8-bit pipelined ADC (Analog to Digital Converter). An 8-bit pipelined ADC is designed. This pipelined ADC uses analog preprocessing to divide the input signal range into sub-intervals and amplification of a residue signal for further processing in the subsequent stages. The realization of the preprocessing stages has been implemented using switched-capacitor circuits. The proposed BIST scheme is verified by simulation of 8 bit pipelined ADC with arbitrary faults. The proposed method is alternative to histogram based analysis techniques to provide test time improvements. In addition to the measurement of DNL (Differential Non Linearity) and INL (Integral Non Linearity), non monotonic behavior and missing code fault have been detected.