A CMOS Readout Circuit for Silicon Drift Detectors With on-Clip JFET and Feedback Capacitor

Abstract

We propose a CMOS circuit designed to be used with silicon drift detectors (SDDs) for high-resolution and high peak stability X-ray spectroscopy. The circuit is developed in the framework of a project for researches on exotic atoms (e.g., kaonic hydrogen) at e-/e+ colliders. The circuit is composed by a low-noise charge preamplifier, by a sixth-order semi-Gaussian shaping amplifier with four selectable peaking times from 0.7 mus up to 3 mus, and by a bipolar shaping amplifier to provide a timing signal required by the experiment. The preamplifier operates with the input JFET directly integrated on the detector itself. A low-frequency current-mode feedback loop allows to stabilize the operating point of the input JFET with respect to background and leakage current variations. The feedback capacitor is also integrated on the detector. Because its value is not known precisely a priori, the preamplifier is designed with the possibility to adjust externally its decay time to match the fixed time constant of the pole/zero network. A baseline holder senses the baseline voltage shifts at the output of the circuits due to the dc changes of the drain voltage of the input JFET in correspondence of background variations and provides a feedback loop back to the preamplifier to stabilize the output baseline. A first prototype has been realized in the 0.35-mum AMS technology. The energy resolution measured using the chip with a SDD of 5 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> is of 137 eV at 6 keV (ENC=8 e-rms)