A Baseline Holder for CMOS Readout Circuits with Feedback Extension to the Charge Preamplifier

Abstract

We are developing a CMOS circuit to be used with silicon drift detectors (SDDs) for high-resolution and high peak stability X-ray spectroscopy. The single analog channel of the circuit is composed by a low-noise charge preamplifier and by a 6th order semiGaussian shaping amplifier. The preamplifier operates with the input JFET and the feedback capacitor directly integrated on the detector itself. The discharge of the leakage current is performed by an avalanche mechanism on the drain-gate junction of the JFET. A low-frequency current-mode feedback loop adjusts the operating point of JFET drain with respect to background and leakage current variations. Because JFET drain, preamplifier output and shaper output are all DC coupled, any variation of the drain voltage causes a baseline shift at the shaper output. We have designed a baseline holder (BLH) which senses the baseline voltage shifts at the output of the circuit and provides a feedback loop back to the preamplifier to stabilize the output baseline. The BLH feedback signal is fed into a suitable point of the preamplifier in order to allow the JFET drain to be adjusted for the discharge of the leakage current and at the same time minimizing the shift of the preamplifier and shaper output voltages. The impact of the BLH on the noise performances of the whole circuit has been verified to be negligible. Baseline shifts limited to less than 1 mV have been obtained.