A CMOS imager with on-chip variable resolution for light-adaptive imaging

Abstract

In addition to advantages of lower power and system miniaturization through camera-on-a-chip implementation, the CMOS active pixel image sensor (APS) enables development of smart imagers by integrating custom CMOS signal processing circuits on the focal plane. This CMOS APS imager is capable of enhancing signal to noise ratio (S/N) under low illumination through summation of signals from neighboring pixels. On-chip S/N improvement in CMOS APS is demonstrated by pixel averaging or by pixel binning. Pixel binning is implemented in a CMOS APS primarily designed for frame-transfer. That implementation suffers from extraneous noise pick-up and high-residual fixed-pattern noise (FPN) due to the use of single-ended column integrator. This APS has improved kernel summing circuits implemented in fully-differential topology. The imager performance is improved by greatly reducing FPN and temporal circuit noise. This multi-resolution APS is suited for application in light-level-adaptive imaging.