Abstract
In this paper, a high-order Sigma-Delta (ΣΔ) modulator in a standard 0.5 µm CMOS technology for a tunneling magneto-resistance sensor (TMR) is presented. The digital output is attained by the interface circuit based on a low-noise chopper front-end and a back-end forth-order Sigma-Delta modulator. The low-noise front-end detection circuit is proposed with correlated double sampling (CDS) technique to eliminate the 1/f noise and offset of operational amplifier. The even harmonics is eliminated by fully differential structure. The interface is fabricated in a standard 0.5 µm CMOS process and the active circuit area is about 4 × 3 mm2. The modulator chip consumes 9.6 mW from a 5 V supply and the sampling frequency is 6.4 MHz. The modulator can achieve a signal-to-noise ratio (SNR) of 121 dB, an effective number of bits 19.85 bits and a harmonic distortion of 113 dB.
Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
