Abstract

The voltage rating of commercial Gallium Nitride (GaN) power semiconductors is limited to 600/650 V because of the lateral structure. Stacking low-voltage switches is an effective way to block higher dc-link voltage. However, unbalanced voltage sharing can occur even with well-matched gate drivers and semiconductors due to the device-to-ground displacement currents. As a result, the low-voltage switches may suffer from over-voltage breakdown. This study presents a novel closed-loop current source gate driver to address the unbalanced dynamic voltage sharing issue. Additional compensation current is actively injected into the switch gate to counteract the voltage imbalance brought by the device-to-ground displacement currents. Compared with the conventional voltage source gate driver-based active gate control method, the proposed current source gate driver tunes the switch turn-off timing and dv/dt more accurately because the switch gate current is directly regulated. Meanwhile, since both the pulse width and amplitude of the compensation gate current can be adjusted, the proposed active gate control is more flexible for adapting to different operating conditions. Moreover, without employing snubber circuits or extra Miller capacitors, the switching speed and switching energy of the GaN devices are not compromised. By implementing the proposed gate driver and voltage balancing schemes, well-balanced voltage sharing can be obtained for both soft-switching and hard-switching scenarios. A series-connected GaN-based multiple pulse tester (MPT) is built to prove the effectiveness of the proposed approach under different load and different switching speed (dv/dt) conditions.

Highlights

  • Gallium Nitride (GaN) power semiconductors offer low specific on-state resistance, fast switching speed, and high operating temperature capabilities compared with Silicon (Si) counterparts

  • Not like the Silicon Carbide (SiC) devices, which have the availability of 1.7 kV rating device on the market and 15 kV rating device in the research stage [3], [4], the highest voltage rating of the commercial GaN HEMTs is only at 600/650 V level due to the lateral structure

  • The low voltage rating of GaN HEMTs hinders their appliance in higher dclink systems such as 800 V-battery-pack electric vehicles (EV) and medium voltage (MV) applications

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Summary

INTRODUCTION

Gallium Nitride (GaN) power semiconductors offer low specific on-state resistance, fast switching speed, and high operating temperature capabilities compared with Silicon (Si) counterparts. As mentioned in the introduction, the dynamic voltage imbalance can be caused by: 1) the discrepancies in the gate driving loops; 2) the device parameter tolerance; and 3) the device-to-ground displacement currents for the seriesconnected switches in the stack. For the devices with large input capacitance, such as Si devices and high-current SiC power modules, drain-to-source dv/dt is typically restricted by the gate current during the ‘soft’ turn-off transient. For the devices with small input capacitance, such as discrete WBG devices (SiC and GaN) or even Si super-junction MOSFETs, the device drain-to-source dv/dt is typically determined by the drain/load current during the ‘soft’ turn-off transient. Since the load current will not assist charging/discharging of the device junction capacitances during this transient, the upper arm switches are experiencing ‘hard’ turn-on. It is still very critical to guarantee the consistency of the gate driving circuits for different channels in the stack [28]

PROPOSED VOLTAGE BALANCING SCHEMES IN DIFFERENT SWITCHING SCENARIOS
Voltage Balancing Scheme in ‘Soft’ Turn-Off Scenario
Voltage Balancing Scheme in ‘Hard’ Turn-Off Scenario
Hardware Architecture
Control Algorithm
Experimental Setup
Findings
CONCLUSION
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