A charge recycling TCAM with Checkerboard Array arrangement for low power applications

Takahito Kusumoto Takahito Kusumoto,Yoshio Matsuda Yoshio Matsuda,Masayuki Miyama Masayuki Miyama,Katsumi Dosaka Katsumi Dosaka,Daisuke Ogawa Daisuke Ogawa

doi:10.1109/asscc.2008.4708776

A charge recycling TCAM with Checkerboard Array arrangement for low power applications

Takahito Kusumoto Takahito Kusumoto, Yoshio Matsuda Yoshio Matsuda + Show 3 more

https://doi.org/10.1109/asscc.2008.4708776

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Publication Date: Nov 1, 2008

Citations: 8

Affiliation: Kanazawa University

#Ternary Content Addressable Memory #Ternary Content Addressable Memory Power + Show 8 more

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Abstract

A low power and low noise Ternary Content Addressable Memory (TCAM) architecture is proposed. A TCAM is a powerful engine for search and sort processing, but it has serious power consumption and power line noise problems. To solve these problems, we have developed a charge recycling scheme for match lines, search lines and a Checkerboard Array arrangement. By using these technologies, TCAM power and power line noise can be reduced by 50 % when compared with conventional designs.

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