Abstract
This paper describes the design language approach to a methodology of conceptual design in VLSI. This methodology supports early design for testability and early test design, as well as styles of structured VLSI design. The paper describes the role of the language KARL-III as a tool for specification, test design, chip planning, and design verification, as well as its relations to a number of other design tools. In this context the paper illustrates the most important language primitives for technology-independent hardware descriptions not only at RT level, but also at gate level, and at switch level, as well as for mixtures of these representations.
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