Abstract
This article presents a switched-transformer-based polar Doherty digital power amplifier (DPA) for deep back-off efficiency enhancement. A single-transformer-footprint parallel-combining transformer (PCT) power combiner is introduced for 1.3-3.5-GHz wide frequency coverage, dynamic load modulation at 0-/6-/12-/18-dB power back-off (PBO) levels, and an ultracompact die size. Implemented in 40-nm CMOS, the DPA is powered by a 1.1-V supply and only occupies 0.7 × 1.15 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> chip area. It achieves 21.4-dBm peak power with the power added efficiencies (PAEs) of 31.3%, 27.7%, 16.6%, and 7.7% for 0-/6-/12-/18-dB PBOs at 1.5 GHz. With 20-MHz 64QAM long term evolution (LTE) signal, the DPA achieves P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">avg</sub> of 15.2 dBm and the average PAE of 25.3% with -32.5-dB error vector magnitude (EVM) at 1.5 GHz. Moreover, for 20-MHz 64 QAM WLAN signal, Pavg of 14.7 dBm with the average PAE of 20.1% is obtained with - 25-dB EVM at 2.4 GHz.
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