Abstract
This brief presents a broadband SiGe power amplifier that achieves 30.1 dBm peak <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{P}_{SAT}$ </tex-math></inline-formula> , 38.6% peak power-added efficiency (PAE), 90.9% large-signal fractional bandwidth (FBW) and a 3 dB bandwidth from 5.4 to 13.8 GHz. A balanced topology with two-stage, four-way combing is utilized to achieve watt-level output power and high-power efficiency in a wide range of operating frequency. Power stage is optimized and simulated from the perspective of high output power. At the output stage, a 90° coupler and two transformers are co-optimized for broadband output power combining as well as power matching. This balanced PA is implemented in a 0.13- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\boldsymbol {\mu }\text{m}$ </tex-math></inline-formula> SiGe BiCMOS process with a chip area (with pads) of 2.31 mm2.
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