Abstract
We present a low power on-chip oscillator for system-on-chip designs. The oscillator introduces a resistive frequency locking loop topology where the equivalent resistance of a switched-capacitor is matched to a temperature-compensated resistor. The approach eliminates the traditional comparator from the oscillation loop, which consumes significant power and limits temperature stability in conventional relaxation oscillators. The oscillator is fabricated in 0.18μm CMOS and exhibits 27.4ppm/°C and <7ppm long-term stability while consuming 99.4nW at 70.4 kHz.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
More From: Symposium on VLSI Circuits : [proceedings]. Symposium on VLSI Circuits
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.