A 91-GHz Fundamental VCO With 6.1% DC-to-RF Efficiency and 4.5 dBm Output Power in 0.13-<inline-formula> <tex-math notation="LaTeX">$\mu$ </tex-math> </inline-formula>m CMOS

Abstract

In this letter, we present a systematic method for designing high-efficiency, high-power millimeter wave oscillators. This method effectively manipulates the dc current of the drain of the core transistors to minimize the time during which the transistor is on. Furthermore, an additional capacitor at the source of the transistor assists lowering the power consumption while maintaining the same fundamental generated power. To show the feasibility of this method, a class-E-type oscillator architecture is implemented in a 0.13-μm CMOS technology (f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> = 116 GHz). The proposed voltage-controlled oscillator (VCO) achieves the record DC-to-RF efficiency of 6.1% at a center frequency of 91 GHz (~0.8*f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> ) on CMOS. The measured peak output power is 4.5 dBm while the VCO consumes 46 mW of dc power and features a figure of merit of -169.6 dBc/Hz at 1-MHz offset frequency. The fabricated VCO occupies 0.51 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> of silicon area including the pads.