Abstract
A 4-Mb*4 SRAM (static random access memory) with a 9-ns access time that uses a 0.35- mu m CMOS process with KrF excimer laser lithography is descibed. The 9-ns access time is achieved by using a current-mode nonequalized read data path with an offset-reduced stabilized-feedback current sense amplifier and a quadrant-organization architecture. The design includes a current-mode wired-OR 64-b*4 parallel test circuit. The typical address access time is 9 ns at a supply voltage of 3.3 V and an output load capacitance of 30 pF. Active current is 72 mA at 30 MHz under typical conditions.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
Published Version
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