Abstract
This brief presents an ultra-low-power (ULP) current reference circuit based on $V_{th}$ (threshold voltage), which consumes pico-watt of power under 0.5V supply voltage. Compared to traditional current references based on threshold voltage, this design uses no amplifier, thus friendly scaling and simple structure are achieved simultaneously. In order to save area, the huge resistor is replaced by a gate-leakage MOS transistor. The proposed circuit is designed in a 40nm CMOS process. The minimum supply voltage is 0.5V. Post simulation results show that the power consumption is only 8.2pW at 0.5V $V_{DD}$ at room temperature. According to our knowledge, this is the smallest power consumption compared to prior works, thanks to its simple structure. Under process + mismatch Monte-Carlo simulations, the temperature coefficient after trimming is 18.6ppm/°C over 0°C to 85°C. The core area is only 0.00025mm2 in layout. Apart from the 40nm process, this circuit is also designed in a 130nm process to demonstrate the robustness under different processes.
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